ECE/CS 552: Introduction to Computer Architecture

Fall Semester 2004


Table of Contents

Instructor Information

Course Information

    John L. Hennessy and David A. Patterson, Computer Organization and Design: The Hardware/Software Interface, 2nd Edition, Morgan Kaufmann Publishers, 1998.

There will be five homework assignments, approximately one assignment two weeks apart. Some of the assignments will require the use of the Mentor Graphics design automation tools. There will also be a course project that will involve the design of a small CPU. Students will have accounts to run the Mentor tools in CAE.

Some assignments and the project should be done in groups of three students. (When an assignment is handed out, we will indicate whether you should do it alone, or in a group.) Each member of a group is expected to participate in the solution of the entire assignment. All assignments will not be weighted equally. The approximate weight of each assignment will be specified when the assignment is handed out.

All logic diagrams should be drawn using either the Mentor Graphics Tool Suite or other tools capable of producing high quality logic diagrams.

Assignments are due by 5:00 P.M on the due date. No late assignments will be accepted. 

The discussion session is scheduled from 5:00-6:00 PM on Wednesdays in Room 121 Psychology.   Discussions will be used for question answering, exam review, and covering any topics as requested by members of the class.   On weeks when the discussion session does not meet, the TA will have an additional office hour at the same time.
There will be two exams, of equal weight. Exam I will be in class on Tuesday, Oct. 26, 2004.
Exam II will be during the scheduled final exam slot on Fri.., Dec 22, 2004, at  2:45 PM
 
Homework     15%
Exam I           30%
Project           25%
Exam II          30%

Calendar 

 Date(s)             Topic(s)                                                    Text Sections
Sep. 2               Introduction; Architecture                         Chapter 1
Sep. 7               Mentor Graphics Tutorial                          Mentor Tools
Sep. 9,14          Instruction Sets                                         3.1-3.12
Sep. 16, 21       Arithmetic I                                               4.1-4.5
Sep.  23            Datapath Design                                       5.1-5.3
Sep. 28,30 Oct. 5
                         Control                                                     5.4-5.9; Appendix C
Oct. 7               Performance                                             Chapter 2
Oct. 12, 14       Pipelining                                                  6.1-6.7
Oct. 19             Superscalar processors                             6.8-6.9
Oct. 21             Review
Oct. 26             Midterm
Nov. 2, 4          Cache Memories                                      7.1-7.3, 7.5
Nov. 9              Main Memory                                           7.1; B31-B35; handout
Nov. 11,18       Virtual Memory                                        7.5,7.6
Nov. 23,30       Arithmetic II                                             4.6-4.10
Dec. 2, 7          Input/Output                                             8.1-8.7
Dec.  9             Multiprocessors                                        9.1-9.9
Dec  14            Catch-up, Review

News

         Office hours exam week:Mon. and Tues.  Dec. 20, 21  2:30-3:30 both days
         Multiprocessor lecture slides avaliable
         Homework 6 assigned; not to be turned in or graded
         Homework 5 assigned; due Dec. 9
         Posted multiplication/division examples; Nov. 29
         No Lecture Nov. 16
         Homework 4 due Nov. 18
         Memory technology slides available; Nov. 9.
         Homework 4 assigned -- due Nov. 16
         Special office hour --  10/22 2-3PM
         I will be out of town 10/25-29; contact Scot Kronenfeld
         Homework 3 Solutons avaliable, Oct. 21
         No Lecture Oct. 28
         Exam Oct. 26, in class
         Exam 1 from Spring semester available, Oct. 19
         Homework 2 Solutions available; Oct. 18
         Homework 3 assigned; due Oct. 19
         Homework 2 assiigned; due Oct. 7
         Added link to lecture material derviing control signals for multi-cycle design
         NOTE:
Homework 1 explanation of grading added to assignment.
         Sept. 15;  Homework 1 assignment; due Sept. 30
         Sep. 7 (Optional) Mentor graphics tutorial at 101 Wendt Library during lecture period
(startiing at 1PM)
         Aug. 31;  Web page updated  -- lecture order modified
         

Mentor Tools

Homeworks

     Homework 1 assignment
     Homework 2 assignment
     Homework 2 solutions
     Homework 3 assignment
     Homework 3 solutions
     Homework 4 assignment
     Homework 4 solutions
     Homework 5 assignment
     Homework 5 solutions
     Homework 6 assignment
     Homework 6 solutions

Project

    Project Architecture
    Project Assignment
  

Miscellaneous Links

    Lecture 1 slides  
    Chapter 3 (Instruction Sets) slides
    Chapter 4 slides (including CLA and barrel shifter)
    Multicycle control signal derivation
    Exam 1 Spring 2004
    Cache memory control
    Memory slides
    Mulltiply/Divide examples
    Multiprocessors
    IO Slides