May 2006

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Virtual Machine Architectures, Implementations, and Applications 

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Table of Contents

• Instructor Information
• Course Information
• News
• Calendar
• Course Outline
• Readings
• Lecture Notes
• Project
• Miscellaneous Links

Instructor Information

Prof. James E. Smith

Office:            
Office phone:   
Email:               jes@ece.wisc.edu

Course Information

• Required Course Material

          Readings from the literature (below)
 

• Reference Course Material

1) J. E. Smith and R. Nair, Virtual Machines: Versatile Platforms for Systems and Processes, Morgan Kaufmann, 2005.

2) John L. Hennessy and David A. Patterson, Computer Architecture: A Quantitative
     Approach, 2nd Edition, Morgan Kaufmann Publishers, 1996.
3) Andrew S. Tanenbaum, Modern Operating Systems, 2nd Edition, Prentice Hall, 2001.
 
• Project

The default project is to write a paper that surveys an area within virtual machines.

Project proposal (1 page)  due May 29
Final report due June 15 

News

        Web site created May 10, 2006
 

Calendar

        Class will meet on the following schedule.

        May 15 -- 1400-1700
        May 16 -- 1200-1400, 1500-1700
        May 17 -- 1400-1700

        May 22 -- 1400-1700
        May 23 -- 1200-1400, 1500-1700
        May 24 -- 1400-1700

Course Outline

1. Introduction (1 hour)
     Motivation
    Architecture, abstraction, virtualization
    VM types and applications
    Course Roadmap

2. Emulation: Interpretation and Binary Translation (3 hours)
     Decode-dispatch interpretation
     Threaded interpretation
     Translation chaining
     Design issues and alternatives
     Case Study: Shade

3. Process VMs (3 hours)
     VM Integration
     Code Cacheing
     Handling OS calls
     Case studies: FX!32, WABI

4. Dynamic  Optmization (3 hours)
     Profiling
     Staged optimization
     Superblock optimization
     Precise traps
     Condition codes
     Case studies:  IA-32 EL, HP Dynamo

5. Co-Designed VMs (4 hours)
     Microarchitecture
     Support for speculation
     Precise interrupts
     Superscalar processors
     Power/resource  management
     Case studies: Daisy, Crusoe, rePLay, AS/400

6. System VMs (3 hours)
   OS management and protection of resources
   Virtualizing memory, processor, I/O
   Instruction set virtualizability
   Hosted VMs  
   Case studies: IBM VM/370, Intel x86 VMware, Vanderpool

Readings

• J. E. Smith and Ravi Nair,  "The Architecture of Virtual Machines," Computer, May 2005.
•  B. Cmelik and D. Keppel, "Shade: A Fast Instruction-Set Simulator for Execution Profiling," University of Washington Technical Report, UWCSE 93-06-06.
• Baraz, L, T. Devor, O. Etzion, S. Goldenberg, A. Skaletsky, Y. Wang, and Y. Zemach. 2003. IA-32 Execution Layer: A Two-phase Dynamic Translator Designed to Support IA-32 Applications on Itanium based Systems, Proc. 36th Annual IEEE/ACM International Symposium on Microarchitecture, (December), pp. 191-204.
• R. J. Hookway, M. A. Herdeg, "Digital FX!32: Combining Emulation and Binary Translation," Digital Technical Journal, Jan. 1997, pp. 3-12. 
• Hohensee, P.,  M. Myszewski,  and D. Reese. 1996. Wabi CPU Emulation, Proceedings of the 8th HotChips Symposium, (August) , pp. 47-65.
• B. C. Le, "An Out-of-Order Execution Technique for Runtime Binary Translators,"  Proc. 8th ASPLOS, 1998, pp. 151-158.
• V. Bala, E. Duesterwald, S. Banerjia, "Transparent Dynamic Optimization: The Design and Implementation of Dynamo," HP Laboratories Technical Report  HPL-1999-78, June 1999.
  
• K. Ebcioglu, et al., "Dynamic Binary Translation and Optimization," IEEE Transactions on Computers, June 2001, pp. 529-548.
• A. Klaiber, "The Technology Behind Crusoe Processors," Transmeta Technical Brief, 2000. 
• Fahs, B., S. Bose, M. Crum, B. Slechta, F. Spadini, T. Tung, S. J. Patel, and S. S. Lumetta.  2001. Performance Characterization of a Hardware Mechanism for Dynamic Optimization, Proc. 34th Int. Symp. Microarchitecture,  (December), pp. 16-27. 
• Bertsis, V. 1980.  Security and Protection of Data in the IBM System/38, Proc. 7th Annual Symposium on Computer Architecture, (June), pp. 245-252. 
• Dehnert, J. C., B. K. Grant, J. P. Banning, R. Johnson, T. Kistler, A. Klaiber, J. Mattson. 2003. The Transmeta Code Morphing Software: Using Speculation, Recovery, and Adaptive Retranslation to Address Real-Life Challenges, Proc. Int. Symp. Code Generation and Optimization, (March), pp. 15-24.
• A. Dhodapkar and J. E. Smith, Managing Multi-Configuration Hardware via Dynamic Working Set Analysis, Int. Symp. on Computer Architecture, 2002.
  
• R. Goldberg, "Formal Requirements for Virtualizable Third Generation Architectures," CACM,  July 1974, pp. 412-421.
• Anon. "VMware Virtual Platform Technology White Paper", VMware Corporation, 1999.
• M. Rosenblum, "VMware's Virtual Platform Technology,"  Stanford Computer Systems Seminar,  Jan. 12, 2000.
• J. Sugerman, et al., "Virtualizing I/O Devices on VMware Workstation's Hosted Virtual Machine Monitor," USENIX 2001. 
• Intel, 2005. Intel Vanderpool Technology for IA-32 Processors (VT-x) Preliminary Specification, Order Number C97063-001, Santa Clara, CA (January).
• J. Olin, "Inside the Java Virtual Machine", 1996
• M. Arnold et al., "Adaptive Optimization in the Jalapeno JVM", OOPSLA '00, Oct. 2000.

Lecture Notes

• Introduction to Virtual Macines
• Emulation: Interpretation and Binary Translation
• Process Virtual Machines
• Dynamic Optimization
• Co-Designed VMs
• System VMs
• HLL VMs
  

Miscellaneous Links

• Melinda Varian's homepage; a number of OS VM links, mostly IBM-related; lots of good historical information, written by people who were there.
• x86 instruction descriptions, in a reasonably easy-to-use online form (under "Instruction Set")
• IBM Daisy Project; information regarding the IBM Daisy VLIW system; and important co-designed VM.